ADC 320F Specifications download pdf (Page 16)

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MAX_CONV1

Ch Sel (CONV00)

Ch Sel (CONV01)

Ch Sel (CONV03)

Ch Sel (CONV02)

Ch Sel (CONV07)

State

pointer

12-bit A/D

converter

EOC

Result MUX

Result

select

ADCRESULT0

ADCRESULT1

ADCRESULT7

SEQ1

Software

ePWMx SOCA

External pin

(XINT2_ADCSOC)

Note: Possible values:

Channel select = 0 − 15

MAX CONV1 = 0 − 7

SOC1 EOC1

MUX

Ch Sel (CONV15)

Ch Sel (CONV08)

Ch Sel (CONV09)

Ch Sel (CONV11)

Ch Sel (CONV10)

ePWMx SOCB

MAX_CONV2

SOC2 EOC2

Software

SEQ2

Start-of-sequence

trigger

Result

select

ADCRESULT15

Result MUX

ADCRESULT9

ADCRESULT8

MAX CONV2 = 0 − 7

State

pointer

Start-of-sequence

trigger

4 4

SOC

Sequencer arbiter

ADCINA0

ADCINA1

ADCINA7

Analog MUX

MUX

select

ADCINB1

ADCINB7

MUX

select

ADCINB0

S/H-A

S/H-B

ADC start of conversion (SOC) trigger sources

Autoconversion Sequencer Principle of Operation

Figure 1-5. Block Diagram of Autosequenced ADC With Dual Sequencers

Note: There is only one ADC in the DSP. This converter is shared by the two sequencers in

dual-sequencer mode.

The sequencer operation for both 8-state and 16-state modes is almost identical; the few differences are

highlighted in Table 1-2 .

Analog-to-Digital Converter (ADC)16 SPRU812A – September 2007 – Revised October 2007

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ADC 320F Specifications Page 16

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